New PDF release: Advances in Computer Systems Architecture: 9th Asia-Pacific

By James E. Smith (auth.), Pen-Chung Yew, Jingling Xue (eds.)

ISBN-10: 3540230033

ISBN-13: 9783540230038

ISBN-10: 354030102X

ISBN-13: 9783540301028

On behalf of this system committee, we have been happy to give this year’s application for ACSAC: Asia-Paci?c desktops structure convention. Now in its 9th yr, ACSAC keeps to supply an exceptional discussion board for researchers, educators and practitioners to return to the Asia-Paci?c quarter to replace principles at the newest advancements in desktops structure. This 12 months, the paper submission and overview techniques have been semiautomated utilizing the loose model of CyberChair. We obtained 152 submissions, the biggest quantity ever.Eachpaperwasassignedatleastthree,mostlyfour,andinafewcaseseven ?ve committee participants for overview. all the papers have been reviewed in a t- monthperiod,duringwhichtheprogramchairsregularlymonitoredtheprogress of the evaluate method. while reviewers claimed insufficient services, extra reviewers have been solicited. after all, we acquired a complete of 594 studies (3.9 in line with paper) from committee individuals in addition to 248 coreviewers whose names are stated within the court cases. we want to thank them all for his or her time and e?ort in offering us with such well timed and top quality stories, a few of them on super brief notice.

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Extra resources for Advances in Computer Systems Architecture: 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004. Proceedings

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Springer-Verlag Berlin Heidelberg 2004 Efficient Victim Mechanism on Sector Cache Organization 17 tium® 41[5], SUN’s SPARC™[6] and IBM’s POWERPC™ G4™[7]/G5™[8] all employ sector cache in their cache organization. This work intends to propose and evaluate further optimization techniques to improve performance of a sector cache. One of those designs is the victim cache[9]. A victim cache includes an additional victim buffer. When a line is replaced it is put into this small buffer which is full associative instead of just being discarded.

This is because of higher underutilization cache space exist with higher s-ratio. On the other hand SVC and LVC performs better with larger line and sector sizes. Figure 7 compares how the victim mechanisms affect caches with different associativities or different cache sizes. It is not surprising to learn that all three forms of victim mechanisms help the lower associative cache better. This is because higher associativity already reduced much of the conflict misses victim cache is targeting. It is also seen smaller L1 cache benefits more from the victim mechanisms.

1 Related Work Sector caches can be used to reduce bus traffic with only a small increase in miss ratio[15]. Sector cache can benefit in two-level cache systems in which tags of the second level cache are placed at the first level, thus permitting small tag storage to control a large cache. Sector cache also is able to improve single level cache system performance in some cases, particularly if the cache is small, the line size is small or the miss penalty is small. The main drawback, cache space underutilization is also shown in [13].

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Advances in Computer Systems Architecture: 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004. Proceedings by James E. Smith (auth.), Pen-Chung Yew, Jingling Xue (eds.)


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